Thermal goo application

[Rastalovich]

U get the recomendations and those template things, that give the impression that a postage stamp sized splodge is kinda what`s required.

Seeing 50million replacement hs a year, I`ve noticed manufs moving to 3 really thin stripes - quite a difference. But then they`re probably using different stuff to what they used to.

Compounding all this, I see a reviewer, and obviously an oc`er, applying 1 "squeeze" across the cpu, about the width to cover the cores underneath, but about as thick as spaghetti - and that`s it. Obviously these type of people would be a strong banker to follow.

Myself, I`m thinking u apply either of the above, the pushdown of the hs is going to moosh it all out to the sides in anycase.

I can see the reason for the spaghetti strip tho if ur doing lots of reviews with the same Scythe type hs tho.

What do u do ?

 

[FarFarAway]

What do I do?

Spread a thin layer on the CPU and a thin layer on the heatsink itself. Always works and always gets good temps and maximum surface area.

 

[NickS]

I find the line method works the best on quads, and the big o'le blob method works great for single-die things.

 

[Rastalovich]

I`m also thinking the guys who lap their cpus will tell ya the best what area is `actually required`, hence NickS knowing about the cores - inherently the quads have been 2 `regular cores` squeazed and slightly centralized under the same area.

I don`t think also that too much ~really~ matters, as afaic u push ur hs down and it all goes flat - just gotta watch u don`t go silly with it.

During the curing, would it be fair to say it would take care of any potentional air-pockets ?

Interesting, I spose just applying a spaghetti strip is kinda time saving too, economical - if there`s anything in it.

 

[FarFarAway]

Ye the CPU's are indeed in the middle of the chip and getting smaller every revision

But seriously, a small strip or a smoothed out application will work fine for every CPU with an IHS out there.

 

[mrapoc]

I did a line about 5mm in width and about 1cm from top/bottom down the middle. As instructed on the AS5 website

 

[llwyd]

The area coverage of which would be of benefit is the area of the bottom of the heatsink. All TIM over that contact area will be useful, all TIM elsewhere will not.

I spread TIM over the center of the IHS and spread the remainder on the HS base. Sometimes I'll add a tiny blob directly in the center of the IHS, depending on the pressure of the mounting system.

 

[Scarlet Infidel]

Ye the CPU's are indeed in the middle of the chip and getting smaller every revision

Actually, CPU die areas themselves dont change much and sometimes they stick more than one in a package meaning a bigger than normal thermally active area.

Personally I put a small blob in the middle for single die (regardless of number of cores) and a thin line for two dies.

 

[Rastalovich]

Funny this should be bumped.

I watched some of those recent oc`ing record attempt videos with some eastern guyz, some new Abit stuff and sponsered heavily by Intel. LN2 all over the place.

The guy spread the whole surface of the cpu top, painstakingly with care.

 

[FarFarAway]

Actually, CPU die areas themselves dont change much and sometimes they stick more than one in a package meaning a bigger than normal thermally active area.

Personally I put a small blob in the middle for single die (regardless of number of cores) and a thin line for two dies.

I know indeed, but generally the CPU's themselves that stay the same shrink a little, when new tech isn't introduced to up the transistor count

Funny this should be bumped.

I watched some of those recent oc`ing record attempt videos with some eastern guyz, some new Abit stuff and sponsered heavily by Intel. LN2 all over the place.

The guy spread the whole surface of the cpu top, painstakingly with care.

That's what I do

 

[nepas]

i used to spread a thin layer all over the top,now I do what is suggested on the AS5 website

 

[Scarlet Infidel]

Yeah, I think thats definately the right way.

What I disagree with most (on gut feeling) is people applying the paste, putting the heatsink/waterblock on, then removing it to check the paste spread well. Surely then when you put them back together you have introduced loads of air bubbles, dust etc?

Dont, get me wrong, i think its a great way of testing application methods, as long as the final application is not checked in this way.

 

[The Sorcerer]

There is one more way mentioned that you need to put a small goo application in the middle of the proccy's top, insert the heatsink fan and let heat and pressure do the rest. I prefer the as5 over mx2 though mx2 is non-conductive.

 

[The Computer Council]

Horizontal line for Intel Quads, vertical line for Intel C2D. Not too much though, or too little!

 

[nepas]

There is one more way mentioned that you need to put a small goo application in the middle of the proccy's top, insert the heatsink fan and let heat and pressure do the rest. I prefer the as5 over mx2 though mx2 is non-conductive.

that method is for use with amd chips and the other two are for intels