maverik-sg1
New member
The Inq reports:
The next gen of AMD FX chips will have the full 'big cache' Opteron level of L3 cache, most likely 4MB. Until software becomes much more threaded than it is now, this will be more than enough to keep up with the competition, or at least keep things credible. For the first time, the line will be more than a plus one bin and no hard multiplier lock. AMD may wait until it sees competition before unleashing this, but it will happen sooner rather than later.
MAV'S COMMENT:
Makes sense as the 1MB cache (per core) currently used is only on par with the current dual core offerings at a better price - some more value to the FX range otehr than a fully unlocked multiplier will be a good thing.
Or it could be that the next offerings by Intel really are that good (the dynamic cache controller is of particular interest) that AMD have had to do something to the current architecture to stay in front.
Mav
The next gen of AMD FX chips will have the full 'big cache' Opteron level of L3 cache, most likely 4MB. Until software becomes much more threaded than it is now, this will be more than enough to keep up with the competition, or at least keep things credible. For the first time, the line will be more than a plus one bin and no hard multiplier lock. AMD may wait until it sees competition before unleashing this, but it will happen sooner rather than later.
MAV'S COMMENT:
Makes sense as the 1MB cache (per core) currently used is only on par with the current dual core offerings at a better price - some more value to the FX range otehr than a fully unlocked multiplier will be a good thing.
Or it could be that the next offerings by Intel really are that good (the dynamic cache controller is of particular interest) that AMD have had to do something to the current architecture to stay in front.
Mav