It's less architectural similarities and more about the end result for consumers—the prices we pay and the performance we get. Alien was talking about Navi being the Ryzen of GPUs, but I don't see that happening for a long time because the benefits of a multi-chip GPU will only be seen in the absolute bleeding edge of $2k graphics cards, while Ryzen benefited the lower end and TR/EPYC benefited the top-end. If MCM designs from RDNA4 will bring $200-600 GPUs with performance levels that normally would require $400-800 monolithic GPU's, then we'll see something more akin to Ryzen.
That's what will happen.
Die shrinks can only happen for so long. If this article is correct then that means (and I think I have it right) 5nm and 6nm. Beyond that is what? 3nm?
Each time you shrink the wafers become more and more expensive. Mostly because you are on brand new technology. I would imagine they will shrink so far, then start combining them. IDK how it will work, but the "Ryzen" thing was just an idea. That said IF works very well, especially on faster buses. So whether this will require PCIE4, PCIE5 and beyond for the bandwidth to connect them? I really don't know.
What I do know is that small GPUs are very cheap. Not only very cheap, but also far more successful than large ones. Mostly as you reduce the risk of hitting a bad section of wafer and so on. IDK if you have seen the 6500XT die but it's hilariously small. So small you could easily fit four of them in the same space that a 6900XT die takes, for example.
Now obviously right now on whatever node it's on isn't the time. There aren't enough CUs on there to make it worth it. As we shrink though? yeah then I could see why they would do it.
As I mentioned it's not only them doing it. Nvidia plan to do exactly the same, it's just that AMD announced it years ago now and it just hasn't happened yet.
BTW as for it being only for high end GPUs? I doubt that. If you made a die that was say, 10mm2 and then stuck four of them together, even if it were for the same end result as a die 20x20mm2 (so like four of the small dies) you would still have a much, much higher success rate than you would cutting the large one. Mostly because when you cut the large one you are quadrupling the risk of hitting a bad section of silicon, meaning the whole thing is pretty much useless unless you lazer off the bad area.
If you just concentrated on the same small die, then solder multiples of that die to a substrate (so just like Ryzen) then you make bank. Your product stack then works just like Ryzen does. so 4-8 cores is one die, 12-16 cores is two and beyond that you use 3 or four. Obviously with Threadripper there are four regardless of whether they are enabled and active or working.
That is why they were able to sell Ryzen so cheap at launch, and bring down the cost of high cored CPUs massively. And that is why Intel can't compete with them until they get back on the shrink train and get their cores down even smaller. Intel could probably make a 64 core CPU now. Only it would be absolutely friggin huge (I mean, add together four 16 core Ryzen modules) and the failure rate would be absolutely astronomical, as would the cost. Which is why Intel haven't even bothered since 3000 series Threadrippers came out. They simply just can not compete on the technology. IPC? Intel are OK. But the way Ryzen works is how AMD have literally left them in the dust when it comes to high end CPUs.