Why G.SKILL's "Fastest" DDR5 memory isn't their best

"ultra-low latency of CL38-38-38-76"

That's nightmare fuel, I hope the optimisations have a significant effect. Otherwise it's getting spanked by mid tier DDR4 in terms of latency.
 
"ultra-low latency of CL38-38-38-76"

That's nightmare fuel, I hope the optimisations have a significant effect. Otherwise it's getting spanked by mid tier DDR4 in terms of latency.

Not always true. Every generation of DDR has increased the CL timings yet latency has been reduced or maintained parity. CL timings are not the end all be all there's more to memory than just timings.

https://www.anandtech.com/show/16143/insights-into-ddr5-subtimings-and-latencies

Here you can see equal latencies with equal CL timings yet double the bandwidth at virtually every increase between ddr4 and ddr5. Even the worst DDR5-6400 timing set at 56-56-56 is only a few nanoseconds slower than DDR4-3200 at the fastest possible A standard. Moving that DDR5-6400 timing set to A standard is only a .63 nanoseconds increase over the 3200kit but at double the bandwidth so if you have a kit that's not lower than 22 timings it's actually slower or on par if you follow the jedec standard.

Mid tier ddr4 is higher latency than that best case scenario kit, as is ddr5 but that's a normal trend. Overall in consumer applications raw bandwidth per clock is more beneficial. Only in certain scenarios would latency by be super important. But the people buying for that market no far better than we do why they need ultra low latency over raw bandwidth.
 
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I don't consider 3200 CL22 mid tier at this point, that's fairly slow. 3200 CL17 is available for cheap, seems that DDR5 only brings a bandwidth advantage at a price premium initially. Current XMP to XMP is IMO the most realistic comparison - not initial JEDEC standards.


Also, I've found latency to be a significant factor when chasing best frame time percentiles, which is the most important metric for smooth gameplay. Especially for single core bound Dx9 games which tend to choke with lots of action (cough CSGO).
 
Never said it was mid tier.

Also your point proves itself wrong over time, it's slow in your opinion now. It wasn't at launch. Which is what we must compare it to because that's all ddr5 has. Once ddr5 matures it'll be much faster with tighter timings bringing us back in line with a late generation ddr4 vs ddr5 latency comparison. The fact it's already not far off while giving us all the benefits it brings to the table is impressive they maintained the normal parity of latency between generations (given it's the biggest leap in decades).
 
I am definitely not claiming that DDR5 won't catch up - but it's likely a poor value proposition for 12th gen. And they haven't maintained the parity.
 
"ultra-low latency of CL38-38-38-76"

That's nightmare fuel, I hope the optimisations have a significant effect. Otherwise it's getting spanked by mid tier DDR4 in terms of latency.

It's worth noting that DDR5 can do more with each transfer than DDR4, so while CL latencies are higher, it may take DDR5 less cycles to complete many tasks. There are also areas of the DDR5 spec that can decrease latencies outside of the standard CL timings.

Beyond that, latencies can also be defined by the speed of a CPU's memory controller. We need to wait for reviews to see if DDR4 with tight timings is better than early DDR5 with Alder Lake.
 
That's what I vaguely referred to with "optimisations". Interesting to see how it pans out.
 
I am definitely not claiming that DDR5 won't catch up - but it's likely a poor value proposition for 12th gen. And they haven't maintained the parity.

No but you are saying it's slower. It's maintained similar levels of latency with previous launch ddr4 and will most definitely close the gap as WYP pointed out. Value isn't a question when talking about speed.
 
No but you are saying it's slower. It's maintained similar levels of latency with previous launch ddr4 and will most definitely close the gap as WYP pointed out. Value isn't a question when talking about speed.
But clearly the XMP profiles we've seen so far can't match a good DDR4 kit in latency?
 
But clearly the XMP profiles we've seen so far can't match a good DDR4 kit in latency?

Did you even look at the link I gave? I'm not even trying to be a smartass, but it does. Ddr5 4800 is the current standard being used. It's faster and provides hardly any deficit compared to 3200 DDR 4. Yet if you were to increase the ddr4 to similar performance levels you'd definitely see a much larger latency increase on a CAS timing level not including the inherent advantages of ddr5 has already. Just think logically about it tbh. It has historically been this way and will continue to be so
 
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That's not the same performance level. The bandwidth of 3600 isn't even close to ddr5 4800. You must look at the jedec standard to see how ddr5 compares at launch. It's only going to get better from there and as it is has maintained parity similar the previous generational jumps when comparing pure CL timings. And as stated CL isn't the only indication of overall latency.

CL is only measuring the memory look ups on die changes. But it's still doing more per clock cycle.
https://www.rambus.com/blogs/get-re...hile DDR4 DIMMs top out,data rate of 8.4 Gbps.

A memory manufacturer stating it has lower latency access by quite a margin too. I'm not sure what else to tell you. Doing over double the work and delivering more by clock. CPU will have to wait less often... Which is ultimately what matters most and exactly why CL timings aren't everything.
 
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