PCIe 7.0 is now in the works, delivering a 8x bandwidth boost over PCIe 4.0

[WYP]

Forget PCIe 4.0, 5.0, and 6.0. PCIe 7.0 is coming!



Read more about PCI-SIG's plans for PCIe 7.0.

 

[NeverBackDown]

Consumers don't need even 6.0 but it's crazy to think that even now the target markets that would need this could more than likely already use it today and fill up a 16 lane configuration

 

[Kleptobot]

PCIe6 uses pam4 encoding to avoid having to double the clock rate of pcie5 and still achieve double the bandwidth. The argument put forward for this from pci-sig was that pcie5 was already fast enough to pose significant design issues for pcbs to ensure signal integrity and minimise cross talk. From what i can see pcie7 still uses pam4 (i don't see how they could squeeze more out of a frame and not run into massive reduction to the 3db cutoff) and doubling the clock...

tldr:

that's so f***ing fast