WYP
News Guru
Intel's 10nm and GlobalFoundries' 7nm are "more similar than they are different".

Read more about Globalfoundries 7nm process.

Read more about Globalfoundries 7nm process.
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Intel will still have a lead. It'll be a smaller one but it's still ahead. 7nm GloFlo is still about equal to 10nm Intel. Once Intel hit 7nm they'll get a little bit further ahead.
Intel will still have a lead. It'll be a smaller one but it's still ahead. 7nm GloFlo is still about equal to 10nm Intel. Once Intel hit 7nm they'll get a little bit further ahead.
This makes no sense. Their 10nm isn't even out yet, so when do you think they will get 7nm out?
One can only shrink something so much, I think the next tech is not far away and we will be on bio computers soon
Intel will still have a lead. It'll be a smaller one but it's still ahead. 7nm GloFlo is still about equal to 10nm Intel. Once Intel hit 7nm they'll get a little bit further ahead.
This makes no sense. Their 10nm isn't even out yet, so when do you think they will get 7nm out?
This makes no sense. Their 10nm isn't even out yet, so when do you think they will get 7nm out?
While FinFET does serve us well now, GAAFET (Gate All Around-FET) will be the next big thing, where the gate will have 360 coverage around the channel region. Right now FinFETs (Or Tri-Gate transistors) only cover it from three sides.
To be frank I am really getting fed up reading anything about intels future plans as the company have been total a*******s with their very slow uptake of tech.
It took a near bankrupt AMD to release Threadripper and Ryzen to force intel to release anything interesting for the desktop.
There is considerable discussion with the Electrical Engineering community about whether GAAFET is all its cracked up to be.
http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=7890390
Interesting read. It will be interesting to see how things develop. Samsung currently has GAAFETs on their roadmap, though as you said it remains to be seen how well GAAFETs will perform compared to FinFETs. By definition, we receive diminishing returns by surrounding more of the cover the channel, similar to adding more bits to a single channel in NAND (SLC-MLC-TLC-QLC etc).