The PCIe lanes thing is erroneous as the Xeon uses QPI to act as a socket-to-socket communication channel whereas the AMD will use 64 of its PCIe lanes to do the same job, also note that QPI has more than twice the bandwidth than PCIe - meaning socket-to-socket comms will be much slower on the AMD.
So yes if you have a uni-processor server you get all those channels but really it's a 40 vs. 64 situation and very few server users use more than 32 or so per socket, we tend to balance devices across CPUs.
Oh and the AMD clock rates are quite slow.
Is there any mention of CPU functions supported by these AMD chips - in particular AVX2 and AES-NI - it they don't support them then many applications will run considerably slower.