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Dailytech Reports:
Silicon Image and CeRoma work on creating high-def system-on-a-chip
Silicon Image has announced that CeRoma, a leading designer and manufacturer of system-on-a-chip (SoC) solutions for digital video broadcasting, will integrate Silicon Image’s Multistandard High-Definition Video Decoder (MSVD-HD) IP core in a chip for set-top boxes and DTVs.
Silicon Image claims that its MSVD-HD is the only IP core currently available on the market that is able to decode a 1080p at 60 frames per second video stream at low clock speeds.
“The MSVD-HD IP core is capable of decoding two different HD video streams concurrently, so now, only one IP core is required in the set-top-box, video player or digital TV SoC,” said Ron Richter, director of HDMI IP Products at Silicon Image. “Silicon Image can now provide semiconductor companies with immediate access to the latest video standards using our MSVD-HD IP core technology, enabling quick time-to-market, low-cost and low-power implementations.”
The MSVD-HD IP core provides an integrated solution for the three most current high-definition video decoding standards – H.264, MPEG-2 and VC-1 – all in a single design. The MSVD-HD IP core also boasts very low power consumption, an industry-low gate count of just 970 kgates, and a low clock frequency of 150 MHz when decoding two 1080i60 parallel video streams.
“We chose Silicon Image’s MSVD-HD core for a number of reasons – its Full HD video and content capabilities, the smallest gate-count, and extremely low frequencies,” said Uri Avimor, vice president of research and development with CeRoma. “More importantly, integrating this IP core into our library will allow CeRoma to develop the most advanced set-top box and DTV products, while providing a very quick time-to-market delivery at attractive low costs.”
Silicon Image and CeRoma work on creating high-def system-on-a-chip
Silicon Image has announced that CeRoma, a leading designer and manufacturer of system-on-a-chip (SoC) solutions for digital video broadcasting, will integrate Silicon Image’s Multistandard High-Definition Video Decoder (MSVD-HD) IP core in a chip for set-top boxes and DTVs.
Silicon Image claims that its MSVD-HD is the only IP core currently available on the market that is able to decode a 1080p at 60 frames per second video stream at low clock speeds.
“The MSVD-HD IP core is capable of decoding two different HD video streams concurrently, so now, only one IP core is required in the set-top-box, video player or digital TV SoC,” said Ron Richter, director of HDMI IP Products at Silicon Image. “Silicon Image can now provide semiconductor companies with immediate access to the latest video standards using our MSVD-HD IP core technology, enabling quick time-to-market, low-cost and low-power implementations.”
The MSVD-HD IP core provides an integrated solution for the three most current high-definition video decoding standards – H.264, MPEG-2 and VC-1 – all in a single design. The MSVD-HD IP core also boasts very low power consumption, an industry-low gate count of just 970 kgates, and a low clock frequency of 150 MHz when decoding two 1080i60 parallel video streams.
“We chose Silicon Image’s MSVD-HD core for a number of reasons – its Full HD video and content capabilities, the smallest gate-count, and extremely low frequencies,” said Uri Avimor, vice president of research and development with CeRoma. “More importantly, integrating this IP core into our library will allow CeRoma to develop the most advanced set-top box and DTV products, while providing a very quick time-to-market delivery at attractive low costs.”
