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Old 07-10-19, 04:33 PM
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Samsung reveals 12-layer 3D-TSV chip breakthrough - Huge implications for HBM memory

Ready for 24GB HBM2 packages?



Read more about Samsung's 12-layer 3D-TSV technology.

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Old 07-10-19, 04:50 PM
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If it can reduce costs it'll be a winner. Until then for consumer GPUs at least gddr6 makes more sense.
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Old 07-10-19, 04:56 PM
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Quote:
Originally Posted by NeverBackDown View Post
If it can reduce costs it'll be a winner. Until then for consumer GPUs at least gddr6 makes more sense.
TBH, this is mostly for FPGA and datacenter/AI-focused GPUs and discrete AI products. Consumer GPUs don't need the capacity (outside of very niche use cases).
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Old 07-10-19, 06:31 PM
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Very impressive compared to what HBM started out as.
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Old 08-10-19, 01:17 AM
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correct me if i'm wrong, but is this an effective bus width increase too? Seeing as you can address more memory addresses off of fewer pins...
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Old 08-10-19, 04:40 AM
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I would assume since they are now using a 3D layout instead of wire tracing, that each TSV would allow more effective data transmission which would result in an overall higher bandwidth. That's also because they have more physical capacity to. So more memory and more efficient data transmission would result in higher overall bandwidth. In a similar form factor
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