There's no reason to use emulation if you're maintaining ISA compatibility. Besides, emulating a full x86 CPU is a gargantuan task, even for a vastly more powerful x86 CPU, besides being completely unnecessary. The likely approach will be to have a combination of hardware level modifications in the SoC or core to directly emulate or mimic any parts of the previous generations operation that isn't compatible with the new generations way of doing things and can't be emulated easily(Like the Xbone SoC has to enable x360 emulation), as well as some light software emulation or translation for certain elements like audio while the bulk of the software runs more or less directly. Modern programming techniques and modern x86 programmings heavy reliance on abstraction combined with years of development in x86 hypervisors and similar technologies means as long as there's 8 threads(Technically 6 for many games earlier in the generation and 7 for the rest) and each thread can maintain the IPC of a 1.6Ghz Jaguar core in all instruction types and scenarios, there really shouldn't be any issue with compatibility. For this reason I think a ~3.5Ghz Zen CPU(>x2 clock speed and a considerable IPC boost) could get away with 4C/8T while maintaining compatibility if the software trickery required was kept to a minimum. However console parts(particularly larger or more complex ones on less mature nodes) in the past have been known to ship with more cores in silicon than they have activated to improve yields, as well as this the PC gaming CPU market has shifted massively towards 6c designs over the past year or so and that trends only just began. For this reason I think 2CCXs with SMT could be possible with 1 or 2 cores disabled for yield improvements given this will be on a relatively fresh and troublesome 7nm node. Also I think a full 8-cores on an APU SoC would take too much of the available thermal budget without a corresponding clock speed sacrifice, though it is possible if yields are good.
