Intel plan IMC. Kind of.

[K404]

http://www.theinq.com/default.aspx?article=38232

Basically...top-end CPUs only, for the end of next year and it currently look a bit of a mess.

How will an IMC talk to the chipset and RAM?

I`m guessing the traces will join on the way to the RAM which means the IMC has to be the same or very close to the same as whatever NB memory controller Intel have at the time. nVidia chipset support? That looks a mess too- I cant see the IMC matching both Intel and nV controller pin-outs if you see what I mean?

Lower-end parts still use the chipset memory controller....

Well...at least they're thinking about it.

K

 

[Master_G]

Interesting stuff this, hopefully the current situation is only because of the right hand not talking to the left. I would think (but certainly not expect) that a company would try not to have excessive numbers of sockets, but we shall see.

Good to see Intel experimenting in this direct following AMD's success, although i do pray this IMC doesnt suffer from the coldbug!

G