Multi patterning is an incredibly expensive technique originally intended to be a stop-gap solution while EUV ramps up. As EUVs been pushed back, multi-patterning techniques are what have allowed Samsung and co to release sub-28nm products, with exceedingly complicated & expensive numbers of patterns required for Samsungs recent 10nm node that hit consumer devices over the last year, and has been expected to be a big part of Intels 10nm as they were convinced EUV would not be ready in time.
However, TSMC, Samsung, ect have all ramped up EUV production for 7nm as of ~March, to allow them to significantly cut down the sky-rocketing number of "patterns" needed for reliable production, while Intel have been stuck attempting to make increasingly complicated patterning techniques work with 193nm wavelength lithography, which is likely a big part of the reason they havn't made the same progress.
Basically, Intel bet on the wrong horse, and now rather than being a step or two ahead, they're desperately trying to retrace the steps of their competitors.