GDDR3 timings?

[K404]

Hey all! Thats what I`ve got at the mo... thing is...some of those numbers are very high, and some of them I do not recognise. Does anyone have any info on this, or hints and tips on changing them? Its pretty high-end, I know, but if its gonna help a benchmark score, it might be worth a go.

Obviously taking the RAM as high as it`ll go at the existing timings with a certain voltage will prob be the best performance that can be had, but knowledge is always good

Cheers,

Kenny

 

[GoLLuM4444]

I'd assume you just set them as low as you can without causing artifacts.

 

[K404]

Well... the lower I set them, in theory the lower the OC potential will be. Plus, flashing a BIOS to try every change aint as easy as opening A64 tweaker like for syste memory Might go hunting for definitions of those timings later on

 

[maverik-sg1]

Well... the lower I set them, in theory the lower the OC potential will be. Plus, flashing a BIOS to try every change aint as easy as opening A64 tweaker like for syste memory Might go hunting for definitions of those timings later on

Copy details over for any timing information that you find MVKTECH is a good place to start.

Cheers

Mav

 

[K404]

Roger that, Mav

 

[K404]

From what i`ve found so far... theres different brands of GDDR3 and each has a different base set of timings.

Each sub-operation will need a set minimum physical time to complete and hold before the next operation can begin. so 1/clock speed (of memory) x (no.cycles) MUST be greater than or equal to the physical time stated for the memory chips used to maintain stability.

Timings: abbreviations and definitions

tRC- ?

tRFC- Row Cycle Time/ Auto refresh

tRAS- Row Active time (probaly minimum)

tRP- Row Precharge

tRCDRD- RAS to CAS delay to read (minimum)

tRCDWR- RAS to CAS delay to write (minimum)

tRRD- ?

Will update this when I find out more about physical timings and any hints or tips on ideal settings.

 

[Master_G]

Complex stuff, but also very useful, have you got the ns timings of your ram to work it out yet?

G

 

[K404]

I dont have the explicit rating of my particular memory, but I could guess, based on the stock speeds and max OC on stock voltage

I have a list of all the data for the 4 different chip types, but I dont wanan just copy it from the site I found it on. Am waiting for permission.

 

[K404]

heres the details for the 4kinds of Samsung GDDR3 memory. Will find out the rated speeds which should let me get a rough value for the physical times required...which could take a while with a calculator

K4J55323QF-GC12 / K4J55323QG-BC12

tRC 35 // Row cycle time(min) - operation (tCK)

tRFC 45 // Row cycle time(min) - Auto Refresh (tCK)

tRASmin 25 // Row active minimum time (tCK)

tRASmax 100000 // Row active maximum time (tCK)

tRCDRD 12 // Ras to cas delay(min) for Read (tCK)

tRCDWR 7 // Ras to cas delay(min) for Write (tCK)

tRP 10 // Row precharge time(min) (tCK)

tRRD 9 // Row to row delay(min) (tCK)

tWR 7 // Last data in Row precharge (7 tCK)

tCDLR 5 // Last data in to Read delay (6 tCK)

tCDLW 0 // Last data in to Write delay (0 tCK)

tCCD 2 // Col. address to col. address delay (3 tCK)

tCKmin 1.2 // Clock minimum cycle time (ns) - CL=9

tCKmax 6 // Clock maximun cycle time (ns) - CL=9

K4J55323QF-GC14 / K4J55323QG-BC14

tGR 2 // Gapless 2 tCK

tRTW 14 // Read to Write at same bank - CL=9tCK, tCDLR=5tCK

tRC 31 // Row cycle time(min) - operation (tCK)

tRFC 39 // Row cycle time(min) - Auto Refresh (tCK)

tRASmin 22 // Row active minimum time (tCK)

tRASmax 100000 // Row active maximum time (tCK)

tRCDRD 10 // Ras to cas delay(min) for Read (tCK)

tRCDWR 6 // Ras to cas delay(min) for Write (tCK)

tRP 9 // Row precharge time(min) (tCK)

tRRD 8 // Row to row delay(min) (tCK)

tWR 6 // Last data in Row precharge (7 tCK)

tCDLR 5 // Last data in to Read delay (6 tCK)

tCDLW 0 // Last data in to Write delay (0 tCK)

tCCD 2 // Col. address to col. address delay (3 tCK)

tCKmin 1.4 // Clock minimum cycle time (ns) - CL=9

tCKmax 6 // Clock maximun cycle time (ns) - CL=9

K4J55323QF-GC16 / K4J55323QG-BC16

tGR 2 // Gapless 2 tCK

tRTW 12 // Read to Write at same bank - CL=8tCK, tCDLR=4tCK

tRC 27 // Row cycle time(min) - operation (tCK)

tRFC 34 // Row cycle time(min) - Auto Refresh (tCK)

tRASmin 19 // Row active minimum time (tCK)

tRASmax 100000 // Row active maximum time (tCK)

tRCDRD 9 // Ras to cas delay(min) for Read (tCK)

tRCDWR 5 // Ras to cas delay(min) for Write (tCK)

tRP 8 // Row precharge time(min) (tCK)

tRRD 7 // Row to row delay(min) (tCK)

tWR 5 // Last data in Row precharge (7 tCK)

tCDLR 4 // Last data in to Read delay (6 tCK)

tCDLW 0 // Last data in to Write delay (0 tCK)

tCCD 2 // Col. address to col. address delay (3 tCK)

tCKmin 1.6 // Clock minimum cycle time (ns) - CL=8

tCKmax 6 // Clock maximun cycle time (ns) - CL=8

K4J55323QF-GC20 / K4J55323QG-BC20

tGR 2 // Gapless 2 tCK

tWTR 10 // Read to Write at same bank - CL=7tCK, tCDLR=3tCK

tRC 21 // Row cycle time(min) - operation (tCK)

tRFC 27 // Row cycle time(min) - Auto Refresh (tCK)

tRASmin 15 // Row active minimum time (tCK)

tRASmax 100000 // Row active maximum time (tCK)

tRCDRD 7 // Ras to cas delay(min) for Read (tCK)

tRCDWR 4 // Ras to cas delay(min) for Write (tCK)

tRP 6 // Row precharge time(min) (tCK)

tRRD 5 // Row to row delay(min) (tCK)

tCDLR 3 // Last data in to Read delay (6 tCK)

tCDLW 0 // Last data in to Write delay (0 tCK)

tCCD 2 // Col. address to col. address delay (2 tCK)

tCKmin 2 // Clock minimum cycle time (ns) - CL=9

tCKmax 6 // Clock maximun cycle time (ns) - CL=9

The lines highlighted in red are the maxand minimum clock cycle times. The inverse of these numbers gives the rated frequency. Give me a bit and i`ll post them too.

Thanks to Sentential at OCF for letting me use this data. Sorry if the thanks are inappropriate for this forum, but I cant use information without acknowledging the source.

Kenny

 

[Master_G]

Crumbs, i'm not sure i have enough dedication to use them to max out my scores, i do enough maths as it is already lol.

G

 

[K404]

So do I...this should be a walk in the park for us!

Not even sure if much of the stuff I`ve posted even matters!