AMD confirms 12-controller DDR5 Zen 4 CPUs with new Linux patches

[WYP]

Next-generation EPYC CPUs will be capable of insane amounts of bandwidth.



Read more about AMD's planned 12-controller Zen 4 EPYC processors.

 

[NeverBackDown]

Makes you wonder if the 4c design is using vertical cache designs so they are able to fit more cores on die since the L3 real estate is moved upwards, while the 4 design is the traditional layout.