AMD's Ryzen Threadripper PRO 5000 series CPU Specifications have leaked

I like how they say it's 32768KB of L2 cache but 256MB of L3 cache... Why not just say 32MB of L2 cache instead of making it seem like a larger number :p

Outside of that... 32MB of L2 cache is quite ridiculous in a good way. Can't imagine what the V cache technology would do, they could technically expand L2 size if they wanted instead of cores since the L3 moves off die on the same plane at least.
 
I like how they say it's 32768KB of L2 cache but 256MB of L3 cache... Why not just say 32MB of L2 cache instead of making it seem like a larger number :p

Outside of that... 32MB of L2 cache is quite ridiculous in a good way. Can't imagine what the V cache technology would do, they could technically expand L2 size if they wanted instead of cores since the L3 moves off die on the same plane at least.

CPU cache falls into fringe science at best. Increasing L1 and L2 cache size will also increase the latency. More cache can reduce performance. L3 latency is less impactful so it can be scaled with V cache to a certain point. This is good because it reduces the die size.

Mostly it is about fine-tuning and finding the sweet spot between size and latency based on pipeline architecture and several million other factors.
 
It's disadvantages can be combatted with better architecture design. It's one of the biggest areas of focus in CPU architecture from the studies I've seen in my buddies textbook. They are always looking for improvements when increasing size.
 
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