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Old 12-01-19, 12:08 AM
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AMD confirms that there will be no chiplet-based APU this generation

Don't expect the 2nd die on Ryzen 3rd Generation to ever be a graphics chip.



Read more about AMD's single-chip 7nm APU plans.

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Old 12-01-19, 01:07 AM
NeverBackDown NeverBackDown is offline
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Well there goes my theory

Guess it kinda just leaves a 16 core left. Though it begs the question if they do this, what do they plan on doing with Threadripper? Keeping a 16C as the low end but offering the full benefit of the threadripper platform?
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Old 12-01-19, 09:45 AM
meuvoy meuvoy is offline
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Well there goes my theory

Guess it kinda just leaves a 16 core left. Though it begs the question if they do this, what do they plan on doing with Threadripper? Keeping a 16C as the low end but offering the full benefit of the threadripper platform?
They did exactly that in the first generation with a 8 core 16 thread as the low end threadripper even though you could buy a Ryzen 7 1700 1700x or 1800x with the same amount of cores/threads. They might bump threadripper core count to 32/64 since epyc is gonna have 64/128...
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Old 12-01-19, 10:21 AM
tgrech tgrech is offline
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They might bump threadripper core count to 32/64 since epyc is gonna have 64/128...
32 core ThreadRipper was already released last generation (TR 2990WX), they could push to 64 cores in theory with this upcoming gen, they could also delay that move to consumers a gen without much issue.

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Originally Posted by NeverBackDown View Post
Guess it kinda just leaves a 16 core left. Though it begs the question if they do this, what do they plan on doing with Threadripper? Keeping a 16C as the low end but offering the full benefit of the threadripper platform?
AM4 and TR4 are very different platforms with very different IO & features, so they don't really compete with each other, especially when you consider platform pricing and stuff, and two SKUs with the same core county won't necessarily have the same internal layout to reach said core count across the platforms, the 8-core TR 1900X used two half-disabled dies for instance(To get the full compliment of IO)[There was also a first gen Epyc piece with 4 dies each containing 2-cores but the reasons for that pieces existence are fairly mundane], so if 4 dies becomes the new ThreadRipper norm with 8-dies for the top end we could see a 16 core using half disabled 4 dies for the budget chip or something like that.
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Old 12-01-19, 11:34 AM
tgrech tgrech is offline
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On topic: I think this will definitely be a technology that comes with the consoles, where it can offer the ability to break free of the GPU size limits imposed by traditional APU designs to keep costs reasonable on larger total die size, also allowing the use of very modern nodes with less risk to easily cram more power into those fairly small TDP constrained boxes, realistically this is also kinda necessary to get a generational performance leap after the mid-cycle refreshes without costing quite as much.

On desktop this doesn't really make sense, because APUs are still pretty much always bandwidth constrained(All the consoles besides the OneS now use GDDR memory instead of DDR), DDR5 would help but wouldn't solve the issue, really the only solution would be on-interposer HBM caches or something, but such an exotic and expensive solution still has little market, as Intels Hades Canyon G which used VegaM+HBM kinda demonstrated despite its reasonably impressive performance.
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Old 12-01-19, 11:44 AM
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On topic: I think this will definitely be a technology that comes with the consoles, where it can offer the ability to break free of the GPU size limits imposed by traditional APU designs to keep costs reasonable on larger total die size, also allowing the use of very modern nodes with less risk to easily cram more power into those fairly small TDP constrained boxes, realistically this is also kinda necessary to get a generational performance leap after the mid-cycle refreshes without costing quite as much.

On desktop this doesn't really make sense, because APUs are still pretty much always bandwidth constrained(All the consoles besides the OneS now use GDDR memory instead of DDR), DDR5 would help but wouldn't solve the issue, really the only solution would be on-interposer HBM caches or something, but such an exotic and expensive solution still has little market, as Intels Hades Canyon G which used VegaM+HBM kinda demonstrated despite its reasonably impressive performance.
TBH I think AMD would be foolish to not advocate using the same CPU die that they are using in Ryzen 3rd Gen and Threadripper 2nd Gen on next-gen consoles.

They can promise cheaper manufacturing, ensure higher production volumes for their desktop/server chips and ensure better chip bins by sheer volumes. A multi-chip solution makes sense for next-gen consoles, especially if they want a graphics chip that is a lot more powerful than the Xbox One X.

There is the possibility that the console makers won't like this, as it could basically mean that the Xbox (Two?) and PS5 would offer the same processors, with the only difference being clock speeds, but I think it is a given that they will both use Zen.
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Old 12-01-19, 04:34 PM
tgrech tgrech is offline
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Yeah it's very possible for Sony who used mostly unmodified Jaguar cores for the PS4 models, but Microsoft did make a lot of modifications to the Jaguar core for emulating parts of the Xoriginal and X360 and further modifications to the XoneX's cores to optimise general performance, while on AMDs stream I think it was mentioned by Phil Spencer and Lisa Su that the cloud hardware for Xbox game streaming had carried over said CPU modifications and Lisa Su commented on the difficulty and effort that had gone into them so I'd be kinda surprised if that work was dropped for any future iterations, unless the Zen core has the hardware, speed & instructions necessary to be able to forego them already. I guess if this hardware was also going into cloud/server systems as well while being debuted in multiple consumer bins across a couple of consoles they could keep volume high enough to be economical.

Maybe it's possible to offload that custom silicon to a jumped up IO die kinda thing to keep the expensive pieces off-the-shelf but that could end up causing even more headaches elsewhere I guess.
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